THC63LVD1024 - 135MHz 67Bits LVDS Receiver - THine Electronics, Inc.
Features
• Wide dot clock range suited for TV Signal(480i-
1080p), PC Signal(VGA-QXGA)
Dual LVDS port IN/Dual TTL port Out Mode:
8 - 135MHz(CLKOUT)
Dual LVDS port IN/Single TTL port Out Mode:
40 - 150MHz(CLKOUT)
• PLL requires No external components
• Flexible Input/Output mode
1. Single/Dual LVDS port IN /Single/Dual TTL port OUT
2. Double Edge output
• 50% output clock duty cycle
• TTL clock edge selectable
• TTL clock output timing programmable(3 step)
• 2 Output data mapping for simplifying PCB layout.
• Power down mode
• Low power single 3.3V CMOS design
• 144pin LQFP Exposed PAD
**注意 & Noted:
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